58 __m256i x = _mm256_srli_epi64(a, amt);
59 x = _mm256_xor_si256(x, m);
60 __m256i result = _mm256_sub_epi64(x, m);
66 const ui32 src_line_offset,
68 const ui32 dst_line_offset,
75 const si32 *sp = src_line->
i32 + src_line_offset;
76 si32 *dp = dst_line->
i32 + dst_line_offset;
77 __m256i sh = _mm256_set1_epi32((
si32)shift);
78 for (
int i = (width + 7) >> 3; i > 0; --i, sp+=8, dp+=8)
80 __m256i s = _mm256_loadu_si256((__m256i*)sp);
81 s = _mm256_add_epi32(s, sh);
82 _mm256_storeu_si256((__m256i*)dp, s);
87 const si32 *sp = src_line->
i32 + src_line_offset;
88 si64 *dp = dst_line->
i64 + dst_line_offset;
89 __m256i sh = _mm256_set1_epi64x(shift);
90 for (
int i = (width + 7) >> 3; i > 0; --i, sp+=8, dp+=8)
93 s = _mm256_loadu_si256((__m256i*)sp);
95 t = _mm256_cvtepi32_epi64(_mm256_extracti128_si256(s, 0));
96 t = _mm256_add_epi64(t, sh);
97 _mm256_storeu_si256((__m256i*)dp, t);
99 t = _mm256_cvtepi32_epi64(_mm256_extracti128_si256(s, 1));
100 t = _mm256_add_epi64(t, sh);
101 _mm256_storeu_si256((__m256i*)dp + 1, t);
109 const si64 *sp = src_line->
i64 + src_line_offset;
110 si32 *dp = dst_line->
i32 + dst_line_offset;
111 __m256i low_bits = _mm256_set_epi64x(0, (
si64)ULLONG_MAX,
112 0, (
si64)ULLONG_MAX);
113 __m256i sh = _mm256_set1_epi64x(shift);
114 for (
int i = (width + 7) >> 3; i > 0; --i, sp+=8, dp+=8)
117 s = _mm256_loadu_si256((__m256i*)sp);
118 s = _mm256_add_epi64(s, sh);
120 t = _mm256_shuffle_epi32(s, _MM_SHUFFLE(0, 0, 2, 0));
121 t = _mm256_and_si256(low_bits, t);
123 s = _mm256_loadu_si256((__m256i*)sp + 1);
124 s = _mm256_add_epi64(s, sh);
126 s = _mm256_shuffle_epi32(s, _MM_SHUFFLE(2, 0, 0, 0));
127 s = _mm256_andnot_si256(low_bits, s);
129 t = _mm256_or_si256(s, t);
130 t = _mm256_permute4x64_epi64(t, _MM_SHUFFLE(3, 1, 2, 0));
131 _mm256_storeu_si256((__m256i*)dp, t);
138 const ui32 src_line_offset,
140 const ui32 dst_line_offset,
147 const si32 *sp = src_line->
i32 + src_line_offset;
148 si32 *dp = dst_line->
i32 + dst_line_offset;
149 __m256i sh = _mm256_set1_epi32((
si32)(-shift));
150 __m256i zero = _mm256_setzero_si256();
151 for (
int i = (width + 7) >> 3; i > 0; --i, sp += 8, dp += 8)
153 __m256i s = _mm256_loadu_si256((__m256i*)sp);
154 __m256i c = _mm256_cmpgt_epi32(zero, s);
155 __m256i v_m_sh = _mm256_sub_epi32(sh, s);
156 v_m_sh = _mm256_and_si256(c, v_m_sh);
157 s = _mm256_andnot_si256(c, s);
158 s = _mm256_or_si256(s, v_m_sh);
159 _mm256_storeu_si256((__m256i*)dp, s);
164 const si32 *sp = src_line->
i32 + src_line_offset;
165 si64 *dp = dst_line->
i64 + dst_line_offset;
166 __m256i sh = _mm256_set1_epi64x(-shift);
167 __m256i zero = _mm256_setzero_si256();
168 for (
int i = (width + 7) >> 3; i > 0; --i, sp += 8, dp += 8)
170 __m256i s, t, u0, u1, c, v_m_sh;
171 s = _mm256_loadu_si256((__m256i*)sp);
173 t = _mm256_cmpgt_epi32(zero, s);
174 u0 = _mm256_unpacklo_epi32(s, t);
175 c = _mm256_unpacklo_epi32(t, t);
177 v_m_sh = _mm256_sub_epi64(sh, u0);
178 v_m_sh = _mm256_and_si256(c, v_m_sh);
179 u0 = _mm256_andnot_si256(c, u0);
180 u0 = _mm256_or_si256(u0, v_m_sh);
182 u1 = _mm256_unpackhi_epi32(s, t);
183 c = _mm256_unpackhi_epi32(t, t);
185 v_m_sh = _mm256_sub_epi64(sh, u1);
186 v_m_sh = _mm256_and_si256(c, v_m_sh);
187 u1 = _mm256_andnot_si256(c, u1);
188 u1 = _mm256_or_si256(u1, v_m_sh);
190 t = _mm256_permute2x128_si256(u0, u1, (2 << 4) | 0);
191 _mm256_storeu_si256((__m256i*)dp, t);
193 t = _mm256_permute2x128_si256(u0, u1, (3 << 4) | 1);
194 _mm256_storeu_si256((__m256i*)dp + 1, t);
202 const si64 *sp = src_line->
i64 + src_line_offset;
203 si32 *dp = dst_line->
i32 + dst_line_offset;
204 __m256i sh = _mm256_set1_epi64x(-shift);
205 __m256i zero = _mm256_setzero_si256();
206 __m256i half_mask = _mm256_set_epi64x(0, (
si64)ULLONG_MAX,
207 0, (
si64)ULLONG_MAX);
208 for (
int i = (width + 7) >> 3; i > 0; --i, sp += 8, dp += 8)
212 __m256i s, t, p, n, m, tm;
213 s = _mm256_loadu_si256((__m256i*)sp);
215 m = _mm256_cmpgt_epi64(zero, s);
216 tm = _mm256_sub_epi64(sh, s);
217 n = _mm256_and_si256(m, tm);
218 p = _mm256_andnot_si256(m, s);
219 tm = _mm256_or_si256(n, p);
220 tm = _mm256_shuffle_epi32(tm, _MM_SHUFFLE(0, 0, 2, 0));
221 t = _mm256_and_si256(half_mask, tm);
223 s = _mm256_loadu_si256((__m256i*)sp + 1);
224 m = _mm256_cmpgt_epi64(zero, s);
225 tm = _mm256_sub_epi64(sh, s);
226 n = _mm256_and_si256(m, tm);
227 p = _mm256_andnot_si256(m, s);
228 tm = _mm256_or_si256(n, p);
229 tm = _mm256_shuffle_epi32(tm, _MM_SHUFFLE(2, 0, 0, 0));
230 tm = _mm256_andnot_si256(half_mask, tm);
232 t = _mm256_or_si256(t, tm);
233 t = _mm256_permute4x64_epi64(t, _MM_SHUFFLE(3, 1, 2, 0));
234 _mm256_storeu_si256((__m256i*)dp, t);
245 __m256 ct = _mm256_cmp_ps(x, y, _CMP_NLT_UQ);
246 __m256i c = _mm256_castps_si256(ct);
247 __m256i d = _mm256_and_si256(c, a);
248 __m256i e = _mm256_andnot_si256(c, b);
249 return _mm256_or_si256(d, e);
258 __m256 ct = _mm256_cmp_ps(x, y, _CMP_NGE_UQ);
259 __m256i c = _mm256_castps_si256(ct);
260 __m256i d = _mm256_and_si256(c, a);
261 __m256i e = _mm256_andnot_si256(c, b);
262 return _mm256_or_si256(d, e);
266 template<
bool NLT_TYPE3>
270 ui32 bit_depth,
bool is_signed,
ui32 width)
277 assert(bit_depth <= 32);
278 const float* sp = src_line->
f32;
279 si32* dp = dst_line->
i32 + dst_line_offset;
286 si32 neg_limit = (
si32)INT_MIN >> (32 - bit_depth);
287 __m256 mul = _mm256_set1_ps((
float)(1ull << bit_depth));
288 __m256 fl_up_lim = _mm256_set1_ps(-(
float)neg_limit);
289 __m256 fl_low_lim = _mm256_set1_ps((
float)neg_limit);
290 __m256i s32_up_lim = _mm256_set1_epi32(INT_MAX >> (32 - bit_depth));
291 __m256i s32_low_lim = _mm256_set1_epi32(INT_MIN >> (32 - bit_depth));
295 __m256i zero = _mm256_setzero_si256();
297 _mm256_set1_epi32(-(
si32)((1ULL << (bit_depth - 1)) + 1));
298 for (
int i = (
int)width; i > 0; i -= 8, sp += 8, dp += 8) {
299 __m256 t = _mm256_loadu_ps(sp);
300 t = _mm256_mul_ps(t, mul);
301 __m256i u = _mm256_cvtps_epi32(t);
306 __m256i c = _mm256_cmpgt_epi32(zero, u);
307 __m256i neg = _mm256_sub_epi32(bias, u);
308 neg = _mm256_and_si256(c, neg);
309 u = _mm256_andnot_si256(c, u);
310 u = _mm256_or_si256(neg, u);
312 _mm256_storeu_si256((__m256i*)dp, u);
317 __m256i half = _mm256_set1_epi32((
si32)(1ULL << (bit_depth - 1)));
318 for (
int i = (
int)width; i > 0; i -= 8, sp += 8, dp += 8) {
319 __m256 t = _mm256_loadu_ps(sp);
320 t = _mm256_mul_ps(t, mul);
321 __m256i u = _mm256_cvtps_epi32(t);
324 u = _mm256_add_epi32(u, half);
325 _mm256_storeu_si256((__m256i*)dp, u);
333 ui32 bit_depth,
bool is_signed,
ui32 width)
335 local_avx2_irv_convert_to_integer<false>(src_line, dst_line,
336 dst_line_offset, bit_depth, is_signed, width);
342 ui32 bit_depth,
bool is_signed,
ui32 width)
344 local_avx2_irv_convert_to_integer<true>(src_line, dst_line,
345 dst_line_offset, bit_depth, is_signed, width);
349 template<
bool NLT_TYPE3>
353 ui32 bit_depth,
bool is_signed,
ui32 width)
360 assert(bit_depth <= 32);
361 __m256 mul = _mm256_set1_ps((
float)(1.0 / (
double)(1ULL << bit_depth)));
363 const si32* sp = src_line->
i32 + src_line_offset;
364 float* dp = dst_line->
f32;
367 __m256i zero = _mm256_setzero_si256();
369 _mm256_set1_epi32(-(
si32)((1ULL << (bit_depth - 1)) + 1));
370 for (
int i = (
int)width; i > 0; i -= 8, sp += 8, dp += 8) {
371 __m256i t = _mm256_loadu_si256((__m256i*)sp);
374 __m256i c = _mm256_cmpgt_epi32(zero, t);
375 __m256i neg = _mm256_sub_epi32(bias, t);
376 neg = _mm256_and_si256(c, neg);
377 c = _mm256_andnot_si256(c, t);
378 t = _mm256_or_si256(neg, c);
380 __m256 v = _mm256_cvtepi32_ps(t);
381 v = _mm256_mul_ps(v, mul);
382 _mm256_storeu_ps(dp, v);
387 __m256i half = _mm256_set1_epi32((
si32)(1ULL << (bit_depth - 1)));
388 for (
int i = (
int)width; i > 0; i -= 8, sp += 8, dp += 8) {
389 __m256i t = _mm256_loadu_si256((__m256i*)sp);
390 t = _mm256_sub_epi32(t, half);
391 __m256 v = _mm256_cvtepi32_ps(t);
392 v = _mm256_mul_ps(v, mul);
393 _mm256_storeu_ps(dp, v);
401 ui32 bit_depth,
bool is_signed,
ui32 width)
403 local_avx2_irv_convert_to_float<false>(src_line, src_line_offset,
404 dst_line, bit_depth, is_signed, width);
410 ui32 bit_depth,
bool is_signed,
ui32 width)
412 local_avx2_irv_convert_to_float<true>(src_line, src_line_offset,
413 dst_line, bit_depth, is_signed, width);
441 for (
int i = (repeat + 7) >> 3; i > 0; --i)
443 __m256i mr = _mm256_load_si256((__m256i*)rp);
444 __m256i mg = _mm256_load_si256((__m256i*)gp);
445 __m256i mb = _mm256_load_si256((__m256i*)bp);
446 __m256i t = _mm256_add_epi32(mr, mb);
447 t = _mm256_add_epi32(t, _mm256_slli_epi32(mg, 1));
448 _mm256_store_si256((__m256i*)yp, _mm256_srai_epi32(t, 2));
449 t = _mm256_sub_epi32(mb, mg);
450 _mm256_store_si256((__m256i*)cbp, t);
451 t = _mm256_sub_epi32(mr, mg);
452 _mm256_store_si256((__m256i*)crp, t);
454 rp += 8; gp += 8; bp += 8;
455 yp += 8; cbp += 8; crp += 8;
466 __m256i v2 = _mm256_set1_epi64x(1ULL << (63 - 2));
469 for (
int i = (repeat + 7) >> 3; i > 0; --i)
471 __m256i mr32 = _mm256_load_si256((__m256i*)rp);
472 __m256i mg32 = _mm256_load_si256((__m256i*)gp);
473 __m256i mb32 = _mm256_load_si256((__m256i*)bp);
474 __m256i mr, mg, mb, t;
475 mr = _mm256_cvtepi32_epi64(_mm256_extracti128_si256(mr32, 0));
476 mg = _mm256_cvtepi32_epi64(_mm256_extracti128_si256(mg32, 0));
477 mb = _mm256_cvtepi32_epi64(_mm256_extracti128_si256(mb32, 0));
479 t = _mm256_add_epi64(mr, mb);
480 t = _mm256_add_epi64(t, _mm256_slli_epi64(mg, 1));
482 t = _mm256_sub_epi64(mb, mg);
483 _mm256_store_si256((__m256i*)cbp, t);
484 t = _mm256_sub_epi64(mr, mg);
485 _mm256_store_si256((__m256i*)crp, t);
487 yp += 4; cbp += 4; crp += 4;
489 mr = _mm256_cvtepi32_epi64(_mm256_extracti128_si256(mr32, 1));
490 mg = _mm256_cvtepi32_epi64(_mm256_extracti128_si256(mg32, 1));
491 mb = _mm256_cvtepi32_epi64(_mm256_extracti128_si256(mb32, 1));
493 t = _mm256_add_epi64(mr, mb);
494 t = _mm256_add_epi64(t, _mm256_slli_epi64(mg, 1));
496 t = _mm256_sub_epi64(mb, mg);
497 _mm256_store_si256((__m256i*)cbp, t);
498 t = _mm256_sub_epi64(mr, mg);
499 _mm256_store_si256((__m256i*)crp, t);
501 rp += 8; gp += 8; bp += 8;
502 yp += 4; cbp += 4; crp += 4;
531 for (
int i = (repeat + 7) >> 3; i > 0; --i)
533 __m256i my = _mm256_load_si256((__m256i*)yp);
534 __m256i mcb = _mm256_load_si256((__m256i*)cbp);
535 __m256i mcr = _mm256_load_si256((__m256i*)crp);
537 __m256i t = _mm256_add_epi32(mcb, mcr);
538 t = _mm256_sub_epi32(my, _mm256_srai_epi32(t, 2));
539 _mm256_store_si256((__m256i*)gp, t);
540 __m256i u = _mm256_add_epi32(mcb, t);
541 _mm256_store_si256((__m256i*)bp, u);
542 u = _mm256_add_epi32(mcr, t);
543 _mm256_store_si256((__m256i*)rp, u);
545 yp += 8; cbp += 8; crp += 8;
546 rp += 8; gp += 8; bp += 8;
557 __m256i v2 = _mm256_set1_epi64x(1ULL << (63 - 2));
558 __m256i low_bits = _mm256_set_epi64x(0, (
si64)ULLONG_MAX,
559 0, (
si64)ULLONG_MAX);
562 for (
int i = (repeat + 7) >> 3; i > 0; --i)
564 __m256i my, mcb, mcr, tr, tg, tb;
565 my = _mm256_load_si256((__m256i*)yp);
566 mcb = _mm256_load_si256((__m256i*)cbp);
567 mcr = _mm256_load_si256((__m256i*)crp);
569 tg = _mm256_add_epi64(mcb, mcr);
571 tb = _mm256_add_epi64(mcb, tg);
572 tr = _mm256_add_epi64(mcr, tg);
575 mr = _mm256_shuffle_epi32(tr, _MM_SHUFFLE(0, 0, 2, 0));
576 mr = _mm256_and_si256(low_bits, mr);
577 mg = _mm256_shuffle_epi32(tg, _MM_SHUFFLE(0, 0, 2, 0));
578 mg = _mm256_and_si256(low_bits, mg);
579 mb = _mm256_shuffle_epi32(tb, _MM_SHUFFLE(0, 0, 2, 0));
580 mb = _mm256_and_si256(low_bits, mb);
582 yp += 4; cbp += 4; crp += 4;
584 my = _mm256_load_si256((__m256i*)yp);
585 mcb = _mm256_load_si256((__m256i*)cbp);
586 mcr = _mm256_load_si256((__m256i*)crp);
588 tg = _mm256_add_epi64(mcb, mcr);
590 tb = _mm256_add_epi64(mcb, tg);
591 tr = _mm256_add_epi64(mcr, tg);
593 tr = _mm256_shuffle_epi32(tr, _MM_SHUFFLE(2, 0, 0, 0));
594 tr = _mm256_andnot_si256(low_bits, tr);
595 mr = _mm256_or_si256(mr, tr);
596 mr = _mm256_permute4x64_epi64(mr, _MM_SHUFFLE(3, 1, 2, 0));
598 tg = _mm256_shuffle_epi32(tg, _MM_SHUFFLE(2, 0, 0, 0));
599 tg = _mm256_andnot_si256(low_bits, tg);
600 mg = _mm256_or_si256(mg, tg);
601 mg = _mm256_permute4x64_epi64(mg, _MM_SHUFFLE(3, 1, 2, 0));
603 tb = _mm256_shuffle_epi32(tb, _MM_SHUFFLE(2, 0, 0, 0));
604 tb = _mm256_andnot_si256(low_bits, tb);
605 mb = _mm256_or_si256(mb, tb);
606 mb = _mm256_permute4x64_epi64(mb, _MM_SHUFFLE(3, 1, 2, 0));
608 _mm256_store_si256((__m256i*)rp, mr);
609 _mm256_store_si256((__m256i*)gp, mg);
610 _mm256_store_si256((__m256i*)bp, mb);
612 yp += 4; cbp += 4; crp += 4;
613 rp += 8; gp += 8; bp += 8;
void avx2_rct_forward(const line_buf *r, const line_buf *g, const line_buf *b, line_buf *y, line_buf *cb, line_buf *cr, ui32 repeat)
static __m256i ojph_mm256_max_ge_epi32(__m256i a, __m256i b, __m256 x, __m256 y)
void avx2_rct_backward(const line_buf *y, const line_buf *cb, const line_buf *cr, line_buf *r, line_buf *g, line_buf *b, ui32 repeat)
void avx2_rev_convert(const line_buf *src_line, const ui32 src_line_offset, line_buf *dst_line, const ui32 dst_line_offset, si64 shift, ui32 width)
void avx2_irv_convert_to_float(const line_buf *src_line, ui32 src_line_offset, line_buf *dst_line, ui32 bit_depth, bool is_signed, ui32 width)
static void local_avx2_irv_convert_to_integer(const line_buf *src_line, line_buf *dst_line, ui32 dst_line_offset, ui32 bit_depth, bool is_signed, ui32 width)
void avx2_rev_convert_nlt_type3(const line_buf *src_line, const ui32 src_line_offset, line_buf *dst_line, const ui32 dst_line_offset, si64 shift, ui32 width)
static __m256i avx2_mm256_srai_epi64(__m256i a, int amt, __m256i m)
void avx2_irv_convert_to_integer(const line_buf *src_line, line_buf *dst_line, ui32 dst_line_offset, ui32 bit_depth, bool is_signed, ui32 width)
void avx2_irv_convert_to_float_nlt_type3(const line_buf *src_line, ui32 src_line_offset, line_buf *dst_line, ui32 bit_depth, bool is_signed, ui32 width)
static __m256i ojph_mm256_min_lt_epi32(__m256i a, __m256i b, __m256 x, __m256 y)
static void local_avx2_irv_convert_to_float(const line_buf *src_line, ui32 src_line_offset, line_buf *dst_line, ui32 bit_depth, bool is_signed, ui32 width)
void avx2_irv_convert_to_integer_nlt_type3(const line_buf *src_line, line_buf *dst_line, ui32 dst_line_offset, ui32 bit_depth, bool is_signed, ui32 width)